VisionMOS FPGA Development Kit
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The VM-A004 FPGA Development Kit is a powerful, low-cost system for developing designs and applications based around the Altera Cyclone III family of FPGAs. This kit includes hardware, software, design examples and documentation -- everything needed to start developing projects immediately. The preprogrammed hardware elements are fully operational solely over USB. The FPGA source code provided with the kit can be modified to meet design needs, reducing design time in a cost-sensitive environment.



 

This kit can be used for the following applications:
 

  • Rapid Prototyping and Development of Altera Cyclone Design

  • Digital Camera/Image Sensor Interface

  • IP Development and Testing

  • Data Acquisition and Control

  • Data Generator

  • USB to I²C Compatible Bus Bridge


The Development Kit offers the ability to design, compile, download and execute, all via the USB port on your PC. The use of non-volatile memory eliminates the need of constant reprogramming. Free tools including the custom VHDL source code (supplied) with the kit along with free industry standard tools available online allow for a wide range of design flexibility without the need or expense of additional components. This kit can be used to support development from image processing algorithms to automatic camera control.

 

Key Features of the Development Kit:
 

  • High-speed USB 2.0 development platform

  • 20+ Mbytes/second USB Data transfer rates

  • USB Bus-Powered

  • Small Form Factor

  • 100,000 Cycle Programmability

  • Modular, pre-programmed hardware components

  • USB microcontroller subsystem

  • FPGA subsystem

  • Expansion header for optional user device

  • Includes Windows-side drivers

 

 

USB Microcontroller Subsystem:
 

  • Cypress EZ-USB FX2LP Microcontroller - CY7C68014A-100AXC

  • Firmware is pre-programmed in non-volatile memory

  • No USB-specific firmware programming required

  • Easy firmware download via USB

  • Automatic boot-loader

  • 128 Kbit non-volatile program memory

  • I/O expansion header for optional user devices

  • Embedded design

  • Command parser and dispatcher

  • I²C master to FPGA

  • GPIO access to FPGA

  • FIFO for USB Bulk Data Transfer

  • Binary programming file


FPGA Subsystem:
 

  • Altera Cyclone III - EP3C10F256

  • 10,320 Logic Elements

  • 414 Kbits RAM

  • 2 PLLs

  • Firmware is pre-programmed in non-volatile memory

  • Active Serial configuration enabled

  • 2048 Kbyte non-volatile program memory

  • 512 Mbit SDRAM

  • Example FPGA Design

  • Communication hub

  • I²C slave to USB Microcontroller

  • Command parser and dispatcher

  • I²C master to user device

  • Register Map implementation

  • Flow control to USB Microcontroller FIFO

  • FIFO clock generator

  • 16 bit x 4096 FIFO

  • VHDL source code

  • Binary programming file

  • Supported by Altera Quartus II Development Suite


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